Zolemba Zachinsinsi: Chinsinsi Chanu ndichofunika kwambiri kwa ife. Kampani yathu imalonjeza kuti sinaulule chidziwitso chanu kwa chitsimikizo chilichonse chomveka.
Chitsanzo Cha: NSO4GU3AB
Maulendo: Ocean,Air,Express,Land
Mtundu wa Malipiro: L/C,T/T,D/A
Incoterm: FOB,EXW,CIF
4Gb 1600mhz 240-Pin ddr3 udimm
Kukonzanso mbiri
Revision No. |
History |
Draft Date |
Remark |
1.0 |
Initial Release |
Apr. 2022 |
|
Kuyitanitsa pagome lazidziwitso
Model |
Density |
Speed |
Organization |
Component Composition |
NS04GU3AB |
4GB |
1600MHz |
512Mx64bit |
DDR3 256Mx8 *16 |
Kaonekeswe
Hengstar osavomerezeka DDR3 SMMM ism (yopanda kanthu kena ka kawirikawiri) ma module okumbutsa) Ns04bu3ab ndi 512m x 64-bit awiri a 4GB cl11v cl11v sdram mankhwala osokoneza bongo, kutengera zigawo zisanu ndi chimodzi 256m. The Spd imapangidwa ku Jedec Mofananamo Ddr3-1600 nthawi ya 11-11-11 ku 1.5V. Chingwe chilichonse cha 240-pini chimagwiritsa ntchito zala zolumikizira golide. The SDRAM yomwe idasankhidwa imagwiritsidwa ntchito kuti igwiritsidwe ntchito ngati kukumbukira kwakukulu mukayika m'magulu monga ma PC ndi ma PC ndi ma PC ndi GrandStations.
Mawonekedwe
Kutumiza: VDD = 1.5V (1.425V mpaka 1.575V)
vdnq = 1.5V (1.425V mpaka 1.575V)
800mhz fck ya 1600MB / pini
8 bank yamkati yamkati
11, 10, 9, 8, 7, 6
progragram yowonjezera yowonjezera: 0, cl - 2, kapena cl - 1 koloko
8-bit pre-feta
Kutalika kwa burst: 8 (osakhazikika popanda malire, zotsatizana ndi adilesi yoyambira "000 zokha), 4 ndi TcCD =
bi-njira yosinthira
Mayina (kudziletsa); Kudzikuza kwamkati kudzera pa zq pini (Rzq: 240 Ohm ± 1%)
on Die Dimestion pogwiritsa ntchito pini
verage omasuka nthawi yayitali 7.8us otsika kuposa Thumba la Thumba la 85 ° C, 3.9US pa 85 ° C <95 ° <95 ° C
Bwezeretsaninso
Makina obwereketsa osinthika amayendetsa mphamvu
ly-mwapamwamba
pcb: Kutalika 1.18 "(30mm)
rohss zogwirizana ndi zopanda pake
Njira zazikulu za nthawi
MT/s |
tRCD(ns) |
tRP(ns) |
tRC(ns) |
CL-tRCD-tRP |
DDR3-1600 |
13.125 |
13.125 |
48.125 |
2011/11/11 |
Tebulo la adilesi
Configuration |
Refresh count |
Row address |
Device bank address |
Device configuration |
Column Address |
Module rank address |
4GB |
8K |
32K A[14:0] |
8 BA[2:0] |
2Gb (256 Meg x 8) |
1K A[9:0] |
2 S#[1:0] |
Kufotokozera
Symbol |
Type |
Description |
Ax |
Input |
Address inputs: Provide the row address for ACTIVE commands, and the column |
BAx |
Input |
Bank address inputs: Define the device bank to which an ACTIVE, READ, WRITE, or |
CKx, |
Input |
Clock: Differential clock inputs. All control, command, and address input signals are |
CKEx |
Input |
Clock enable: Enables (registered HIGH) and disables (registered LOW) internal circuitry |
DMx |
Input |
Data mask (x8 devices only): DM is an input mask signal for write data. Input data is |
ODTx |
Input |
On-die termination: Enables (registered HIGH) and disables (registered LOW) |
Par_In |
Input |
Parity input: Parity bit for Ax, RAS#, CAS#, and WE#. |
RAS#, |
Input |
Command inputs: RAS#, CAS#, and WE# (along with S#) define the command being |
RESET# |
Input |
Reset: RESET# is an active LOW asychronous input that is connected to each DRAM and |
Sx# |
Input |
Chip select: Enables (registered LOW) and disables (registered HIGH) the command |
SAx |
Input |
Serial address inputs: Used to configure the temperature sensor/SPD EEPROM address |
SCL |
Input |
Serial |
CBx |
I/O |
Check bits: Used for system error detection and correction. |
DQx |
I/O |
Data input/output: Bidirectional data bus. |
DQSx, |
I/O |
Data strobe: Differential data strobes. Output with read data; edge-aligned with read data; |
SDA |
I/O |
Serial |
TDQSx, |
Output |
Redundant data strobe (x8 devices only): TDQS is enabled/disabled via the LOAD |
Err_Out# |
Output (open |
Parity error output: Parity error found on the command and address bus. |
EVENT# |
Output (open |
Temperature event: The EVENT# pin is asserted by the temperature sensor when critical |
VDD |
Supply |
Power supply: 1.35V (1.283–1.45V) backward-compatible to 1.5V (1.425–1.575V). The |
VDDSPD |
Supply |
Temperature sensor/SPD EEPROM power supply: 3.0–3.6V. |
VREFCA |
Supply |
Reference voltage: Control, command, and address VDD/2. |
VREFDQ |
Supply |
Reference voltage: DQ, DM VDD/2. |
VSS |
Supply |
Ground. |
VTT |
Supply |
Termination voltage: Used for control, command, and address VDD/2. |
NC |
– |
No connect: These pins are not connected on the module. |
NF |
– |
No function: These pins are connected within the module, but provide no functionality. |
Zolemba : Gome yomwe ili pansipa ndi mndandanda wambiri wa zikhomo zonse zomwe zingatheke kwa ma module onse a DDR3. Zikhomo zonse zomwe zalembedwa osathandizidwa pa gawo ili. Onani zipika za pini pazidziwitso za gawo ili.
Chithunzi chojambulidwa
4GB, 512Mx64 Module (2Nank of X8)
Magawo a module
Kuyang'ana Kwapakati
Kuyang'ana Kwapakati
Zolemba:
Mitundu ya 1.all ili mu mamilimita (mainchesi); Max / min kapena wamba (njira) pomwe zidadziwika.
2.Tancerance pazaing'ono zonse ± 0.15mm pokhapokha atatchulidwa.
3. Kujambula pang'ono ndikungotanthauza.
Zida Zamagulu : Zowonjezera za mafakitale
Zolemba Zachinsinsi: Chinsinsi Chanu ndichofunika kwambiri kwa ife. Kampani yathu imalonjeza kuti sinaulule chidziwitso chanu kwa chitsimikizo chilichonse chomveka.
Lembani zambiri zomwe zingalumikizane nanu mwachangu
Zolemba Zachinsinsi: Chinsinsi Chanu ndichofunika kwambiri kwa ife. Kampani yathu imalonjeza kuti sinaulule chidziwitso chanu kwa chitsimikizo chilichonse chomveka.